END TERM EXAMINATION | |
Third Semester[BCA] | December 2024 |
Paper Code: BCA-201 | Subject : Computer Organization and Architecture |
Time:3 Hours | Maximum Marks:60 |
Note: Attempt 5 questions in all including Q.No.1 which is compulsory. Select one question from each unit. | |
Q1 Attempt any five of the following questions : (5*4=20) | |
(a) What are the basic laws of Boolean Algebra? | |
(b) Realize T-type flip flop using SR flip flop. | |
(c) Realize using NOR gate : Y=(A+C)(A+D‘)(A+B+C‘). | |
(d) Explain General Register Organization with a diagram. | |
(e) Using the block diagram, explain the logic used in associative memory. | |
(f) Explain different methods of Asynchronous Data Transfer | |
(g) Draw a flowchart for interrupt cycle. | |
UNIT I | |
Q2. What is the need of arithmetic circuit? Design and explain the logic diagram of a circuit for addition-subtraction. Use a control variable w and a circuit that functions as a full adder when w=0, as a full-subtractor when w=1. (10) | |
or | |
Q3. Using the K-map method, simplify the following Boolean functions and obtain: (10) (i) minimal SOP and (ii) minimal POS expressions: (a) Y= ∑m(0,2,3,6,7) + ∑d (8,10,11,15)E |
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UNIT II | |
Q4. a) What is an encoder? Discuss the design of octal to binary encoder. (5) | |
b) What is the major disadvantage of SR flip-flop? How is this addressed in JK flip-flop? (5) | |
or | |
Q5. a) What is a flip-flop. List four basic flip-flop applications. (5) | |
b) Explain the operation of master-slave flip-flop and show how the race around condition is eliminated in it. (5) | |
UNIT III | |
Q6. a) Draw a diagram of a bus system for four registers using three state buffers and a decoder instead of multiplexers. (5) | |
(b) Explain shift Microoperations in detail. (5) | |
or | |
Q7.a) Write a program to evaluate the arithmetic statement using a general register computer. With two address instruction: (5) X= A-B+C*(D*E-F)/ G+H |
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b) Draw and explain flowchart for memory reference instructions (5) | |
UNIT-IV | |
Q8.Explain the following with diagram (any two): (10) (a) Daisy-Chaining Priority (b) Parallel Priority Interrupt (c) DMA Controller |
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or | |
Q9. What is Mapping? Explain all three types of mapping procedure used in transformation of data from main memory to cache memory (10) |